可訂購部件
型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經銷商處購買 |
---|---|---|---|---|
74AHC74PW-Q100 | 74AHC74PW-Q100J | 935300324118 | SOT402-1 | 訂單產品 |
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Click here for more informationDual D-type flip-flop with set and reset; positive-edge trigger
The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC74-Q100; 74AHCT74-Q100 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than VCC
Input levels:
For 74AHC74-Q100: CMOS level
For 74AHCT74-Q100: TTL level
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|
74AHC74PW-Q100 | 2.0?-?5.5 | CMOS | ± 8 | 3.7 | 170 | low | -40~125 | 141 | 7.8 | 68 | TSSOP14 |
Model Name | 描述 |
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型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74AHC74PW-Q100 | 74AHC74PW-Q100J (935300324118) |
Active | AHC74 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
文件名稱 | 標題 | 類型 | 日期 |
---|---|---|---|
74AHC_AHCT74_Q100 | Dual D-type flip-flop with set and reset; positive-edge trigger | Data sheet | 2024-03-07 |
AN11106 | Pin FMEA for AHC/AHCT family | Application note | 2019-01-09 |
SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
ahc74 | ahc74 IBIS model | IBIS model | 2013-04-08 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
SOT402-1_118 | TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
74AHC74PW-Q100_Nexperia_Product_Reliability | 74AHC74PW-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
型號 | Orderable part number | Ordering code (12NC) | 狀態 | 包裝 | Packing Quantity | 在線購買 |
---|---|---|---|---|---|---|
74AHC74PW-Q100 | 74AHC74PW-Q100J | 935300324118 | Active | SOT402-1_118 | 2,500 | 訂單產品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.