74AVC2T45GS-Q100

Dual-bit, dual-supply voltage level translator/transceiver; 3-state

Automotive qualified

The 74AVC2T45-Q100 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual?-?supply pins (V_CC(A) and V_CC(B)). Both V_CC(A) and V_CC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to V_CC(A) and pins nB are referenced to V_CC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.

The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either V_CC(A) or V_CC(B) are at GND level, both A and B are in the high-impedance OFF-state.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

Automotive product qualification in accordance with AEC-Q100 (Grade 1)
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range:
- V_CC(A): 0.8 V to 3.6 V
- V_CC(B): 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
- JESD8-12 (0.8 V to 1.3 V)
- JESD8-11 (0.9 V to 1.65 V)
- JESD8-7 (1.2 V to 1.95 V)
- JESD8-5 (1.8 V to 2.7 V)
- JESD8-B (2.7 V to 3.6 V)
Maximum data rates:
- 500 Mbit/s (1.8 V to 3.3 V translation)
- 320 Mbit/s (<1.8 V to 3.3 V translation)
- 320 Mbit/s (translate to 2.5 V or 1.8 V)
- 280 Mbit/s (translate to 1.5 V)
- 240 Mbit/s (translate to 1.2 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V_CC
I_OFF circuitry provides partial Power-down mode operation
ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

參數類型

型號	V_CC(A) (V)	V_CC(B) (V)	Logic switching levels	Output drive capability (mA)	t_pd (ns)	Nr of bits	Power dissipation considerations	T_amb (°C)	Package name
74AVC2T45GS-Q100	0.8?-?3.6	0.8?-?3.6	CMOS/LVTTL	± 12	2.1	2	very low	-40~125	XSON8

封裝

型號	可訂購的器件編號，（訂購碼(12NC)）	狀態	標示	封裝	外形圖	回流焊/波峰焊	包裝
74AVC2T45GS-Q100	74AVC2T45GS-Q100X (935691566115)	Active	B5	XSON8 (SOT1203)	SOT1203	REFLOW_BG-BD-1	SOT1203_115

環境信息

型號	可訂購的器件編號	化學成分	RoHS	RHF指示符
74AVC2T45GS-Q100	74AVC2T45GS-Q100X	74AVC2T45GS-Q100

品質及可靠性免責聲明

Series

文檔 (10)

文件名稱	標題	類型	日期
74AVC2T45_Q100	Dual-bit, dual-supply voltage level translator/transceiver; 3?-?state	Data sheet	2024-08-12
Nexperia_document_guide_MiniLogic_MicroPak_201808	MicroPak leadless logic portfolio guide	Brochure	2018-09-03
SOT1203	3D model for products with SOT1203 package	Design support	2023-02-02
Nexperia_package_poster	Nexperia package poster	Leaflet	2020-05-15
XSON8_SOT1203_mk	plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body	Marcom graphics	2019-02-04
SOT1203	plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body	Package information	2022-06-03
SOT1203_115	XSON8; Reel pack for SMD, 7''; Q1/T1 product orientation	Packing information	2020-04-21
74AVC2T45GS-Q100_Nexperia_Product_Reliability	74AVC2T45GS-Q100 Nexperia Product Reliability	Quality document	2024-06-16
REFLOW_BG-BD-1	Reflow soldering profile	Reflow soldering	2021-04-06
MAR_SOT1203	MAR_SOT1203 Topmark	Top marking	2013-06-03

支持

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模型

文件名稱	標題	類型	日期
SOT1203	3D model for products with SOT1203 package	Design support	2023-02-02

訂購、定價與供貨

型號	Orderable part number	Ordering code (12NC)	狀態	包裝	Packing Quantity	在線購買
74AVC2T45GS-Q100	74AVC2T45GS-Q100X	935691566115	Active	SOT1203_115	5,000	訂單產品

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