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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車(chē)應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74AVCH4T245BQ-Q100

4-bit dual supply translating transceiver with configurable voltage translation; 3-state

The 74AVCH4T245-Q100 is a 4-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features two 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), an output enable input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied with any voltage between 0.8 V and 3.6 V. This feature makes the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn outputs are in the high-impedance OFF-state. The bus hold circuitry on the powered-up side always stays active.

The 74AVCH4T245-Q100 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range:

    • VCC(A): 0.8 V to 3.6 V

    • VCC(B): 0.8 V to 3.6 V

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • Maximum data rates:

    • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

    • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

    • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

    • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

    • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

    • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

  • Suspend mode

  • Bus hold on data inputs

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

參數(shù)類(lèi)型

型號(hào) VCC(A) (V) VCC(B) (V) Logic switching levels Output drive capability (mA) tpd (ns) Nr of bits Power dissipation considerations Tamb (°C) Package name
74AVCH4T245BQ-Q100 0.8?-?3.6 0.8?-?3.6 CMOS/LVTTL ± 12 2.1 4 very low -40~125 DHVQFN16

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號(hào) 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74AVCH4T245BQ-Q100 74AVCH4T245BQ-Q10X
(935302455115)		 Active H4T245 SOT763-1
DHVQFN16
(SOT763-1) 		SOT763-1 SOT763-1_115

環(huán)境信息

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74AVCH4T245BQ-Q100 74AVCH4T245BQ-Q10X 74AVCH4T245BQ-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (9)

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
74AVCH4T245_Q100 4-bit dual supply translating transceiver with configurable voltage translation; 3-state Data sheet 2024-04-11
AN90007 Pin FMEA for AVC family Application note 2018-11-30
SOT763-1 3D model for products with SOT763-1 package Design support 2019-10-03
avch4t245 74AVCH4T245 IBIS model IBIS model 2019-01-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN16_SOT763-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm body Marcom graphics 2017-01-28
SOT763-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm body Package information 2023-05-11
SOT763-1_115 DHVQFN16; Reel pack, SMD, 7" Q1/T1 product orientation Packing information 2020-04-21
74AVCH4T245BQ-Q100_Nexperia_Product_Reliability 74AVCH4T245BQ-Q100 Nexperia Product Reliability Quality document 2024-06-16

支持

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模型

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
avch4t245 74AVCH4T245 IBIS model IBIS model 2019-01-09
SOT763-1 3D model for products with SOT763-1 package Design support 2019-10-03

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購(gòu)、定價(jià)與供貨

型號(hào) Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購(gòu)買(mǎi)
74AVCH4T245BQ-Q100 74AVCH4T245BQ-Q10X 935302455115 Active SOT763-1_115 3,000 訂單產(chǎn)品

樣品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購(gòu)部件

型號(hào) 可訂購(gòu)的器件編號(hào) 訂購(gòu)代碼(12NC) 封裝 從經(jīng)銷(xiāo)商處購(gòu)買(mǎi)
74AVCH4T245BQ-Q100 74AVCH4T245BQ-Q10X 935302455115 SOT763-1 訂單產(chǎn)品