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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LV4053DB

Triple single-pole double-throw analog switch

The 74LV4053 is a triple single-pole double-throw (SPDT) analog switch, suitable for use in 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (Y0 and Y1) and a common input/output (Z). A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off.

Digital inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Wide supply voltage range from 1.0 V to 6.0 V

  • Optimized for low-voltage applications: 1.0 V to 3.6 V

  • CMOS low power disssipation

  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

  • Low ON resistance:

    • 180 Ω (typical) at VCC - VEE = 2.0 V

    • 100 Ω (typical) at VCC - VEE = 3.0 V

    • 75 Ω (typical) at VCC - VEE = 4.5 V

  • Logic level translation:

    • To enable 3 V logic to communicate with ±3 V analog signals

  • Typical ‘break before make’ built in

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.6 V to 5.5 V)
  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

參數(shù)類型

型號(hào) Package name
74LV4053DB SSOP16

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LV4053DB 74LV4053DB,112
(935174980112)
Obsolete LV4053 SOT338-1
SSOP16
(SOT338-1)
SOT338-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
暫無(wú)信息
74LV4053DB,118
(935174980118)
Obsolete LV4053 暫無(wú)信息

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
74LV4053DB 74LV4053DB,112 74LV4053DB rohs rhf rhf
74LV4053DB 74LV4053DB,118 74LV4053DB rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

Series

文檔 (7)

文件名稱 標(biāo)題 類型 日期
74LV4053 Triple single-pole double-throw analog switch Data sheet 2024-04-02
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SSOP16_SOT338-1_mk plastic, shrink small outline package; 16 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body Marcom graphics 2017-01-28
SOT338-1 plastic, shrink small outline package; 16 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body Package information 2022-06-20
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
lv lv Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫 應(yīng)答表 我們會(huì)盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
lv lv Spice model SPICE model 2013-05-07

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.