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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LVC16244ADL

16-bit buffer/line driver; 5 V input/output tolerant; 3-state

The 74LVC16244A; 74LVCH16244A is a 16-bit buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

The 74LVCH16244A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic

  • IOFF circuitry provides partial Power-down mode operation

  • CMOS low power consumption

  • Multibyte flow-through standard pin-out architecture

  • Low inductance multiple power and ground pins for minimum noise and ground bounce

  • Direct interface with TTL levels

  • High-impedance when VCC = 0 V

  • All data inputs have bus hold. (74LVCH16244A only)

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

參數(shù)類型

型號 Package name
74LVC16244ADL SSOP48

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號，（訂購碼(12NC)） 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LVC16244ADL 74LVC16244ADL,112
(935235140112)		 Withdrawn / End-of-life LVC16244A SOT370-1
SSOP48
(SOT370-1) 		SOT370-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
暫無信息
74LVC16244ADL,118
(935235140118)		 Obsolete LVC16244A SOT370-1_118

環(huán)境信息

下表中的所有產(chǎn)品型號均已停產(chǎn) 。

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74LVC16244ADL 74LVC16244ADL,112 74LVC16244ADL rohs rhf rhf
74LVC16244ADL 74LVC16244ADL,118 74LVC16244ADL rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (8)

文件名稱 標(biāo)題 類型 日期
74LVC_LVCH16244A 16-bit buffer/line driver; 5 V input/output tolerant; 3-state Data sheet 2024-04-09
AN11009 Pin FMEA for LVC family Application note 2019-01-09
AN263 Power considerations when using CMOS and BiCMOS logic devices Application note 2023-02-07
lvc16244a lvc16244a IBIS model IBIS model 2013-04-08
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT370-1 plastic, shrink small outline package; 48 leads; 0.635 mm pitch; 15.9 mm x 7.5 mm x 2.8 mm body Package information 2020-04-21
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

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模型

文件名稱 標(biāo)題 類型 日期
lvc16244a lvc16244a IBIS model IBIS model 2013-04-08

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.