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Click here for more information74LVC2T45GF
Dual supply translating transceiver; 3-state
The 74LVC2T45; 74LVCH2T45 are dual bit, dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two 2-bits input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.
The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.
Active bus hold circuitry in the 74LVCH2T45 holds unused or floating data inputs at a valid logic level.
Alternatives
Features and benefits
Wide supply voltage range:
VCC(A): 1.2 V to 5.5 V
VCC(B): 1.2 V to 5.5 V
High noise immunity
Complies with JEDEC standards:
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
Maximum data rates:
420 Mbps (3.3 V to 5.0 V translation)
210 Mbps (translate to 3.3 V))
140 Mbps (translate to 2.5 V)
75 Mbps (translate to 1.8 V)
60 Mbps (translate to 1.5 V)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
±24 mA output drive (VCC = 3.0 V)
Inputs accept voltages up to 5.5 V
Low power consumption: 16 μA maximum ICC
IOFF circuitry provides partial Power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數類型
型號 | Package name |
---|---|
74LVC2T45GF | XSON8 |
PCB Symbol, Footprint and 3D Model
Model Name | 描述 |
---|---|
|
封裝
下表中的所有產品型號均已停產 。
型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74LVC2T45GF | 74LVC2T45GF,115 (935291513115) |
Withdrawn / End-of-life | V5 |
XSON8 (SOT1089) |
SOT1089 |
REFLOW_BG-BD-1
|
SOT1089_115 |
環境信息
下表中的所有產品型號均已停產 。
型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74LVC2T45GF | 74LVC2T45GF,115 | 74LVC2T45GF |
Series
文檔 (11)
文件名稱 | 標題 | 類型 | 日期 |
---|---|---|---|
74LVC_LVCH2T45 | Dual supply translating transceiver; 3-state | Data sheet | 2024-04-30 |
AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
Nexperia_document_guide_Logic_translators | Nexperia Logic Translators | Brochure | 2021-04-12 |
Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
SOT1089 | 3D model for products with SOT1089 package | Design support | 2019-10-07 |
lvc2t45 | lvc2t45 IBIS model | IBIS model | 2013-04-08 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
XSON8_SOT1089_mk | plastic, extremely thin small outline package; no leads; 8 terminals; 0.55 mm pitch; 1.35 mm x 1 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
SOT1089 | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.5 mm body | Package information | 2022-06-03 |
REFLOW_BG-BD-1 | Reflow soldering profile | Reflow soldering | 2021-04-06 |
MAR_SOT1089 | MAR_SOT1089 Topmark | Top marking | 2013-06-03 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.