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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

74LVC373APW-Q100

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

The 74LVC373A?-?Q100 is an octal D?-?type transparent latch with 3?-?state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D?-?input changes. When LE is LOW the latches store the information that was present at the inputs a set?-?up time preceding the HIGH?-?to?-?LOW transition of LE. A HIGH on OE causes the outputs to assume a high?-?impedance OFF?-?state. Operation of the OE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Overvoltage tolerant inputs to 5.5 V

  • Wide supply voltage range from 1.2 V to 3.6 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • High-impedance outputs when VCC = 0 V

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Power dissipation considerations Tamb (°C) Package name
74LVC373APW-Q100 1.2?-?3.6 TTL ± 24 3 8 low -40~125 TSSOP20

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號，（訂購碼(12NC)） 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
74LVC373APW-Q100 74LVC373APW-Q100J
(935301185118)		 Active LVC373A SOT360-1
TSSOP20
(SOT360-1) 		SOT360-1 SSOP-TSSOP-VSO-WAVE
SOT360-1_118

環(huán)境信息

型號 可訂購的器件編號 化學(xué)成分 RoHS RHF指示符
74LVC373APW-Q100 74LVC373APW-Q100J 74LVC373APW-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (12)

文件名稱 標(biāo)題 類型 日期
74LVC373A_Q100 Octal D-type transparent latch with 5 V tolerant inputs?/?outputs; 3-state Data sheet 2023-08-28
AN11009 Pin FMEA for LVC family Application note 2019-01-09
AN263 Power considerations when using CMOS and BiCMOS logic devices Application note 2023-02-07
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22
lvc373a lvc373a IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP20_SOT360-1_mk plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT360-1 plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.2 mm body Package information 2024-11-15
SOT360-1_118 TSSOP20; Reel pack for SMD, 13''; Q1/T1 product orientation Packing information 2023-08-30
74LVC373APW-Q100_Nexperia_Product_Reliability 74LVC373APW-Q100 Nexperia Product Reliability Quality document 2024-06-16
lvc lvc Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要設(shè)計(jì)/技術(shù)支持，請告知我們并填寫 應(yīng)答表 我們會盡快回復(fù)您。

模型

文件名稱 標(biāo)題 類型 日期
lvc373a lvc373a IBIS model IBIS model 2013-04-09
lvc lvc Spice model SPICE model 2013-05-07
SOT360-1 3D model for products with SOT360-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價(jià)與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74LVC373APW-Q100 74LVC373APW-Q100J 935301185118 Active SOT360-1_118 2,500 訂單產(chǎn)品

樣品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經(jīng)銷商處購買
74LVC373APW-Q100 74LVC373APW-Q100J 935301185118 SOT360-1 訂單產(chǎn)品